Week of May 9, 2026
The AI Hardware Bottleneck: Memory & Storage
Compute is nothing without Data Delivery
A 'chip' in AI is not just the GPU; it is Compute + Interconnect + Memory. While the world obsesses over GPUs, Memory (HBM, DRAM) and Storage (SSD/NAND) have emerged as the critical bottlenecks for AI Inference. SanDisk and Micron are surging as the real scarcity shifts from compute to data staging and delivery.
Two Phases of AI Hardware
Compute, memory, storage, and interconnect are the parts, but which workload uses them most? Training and Inference have fundamentally different bottlenecks.
This Week's Core Breakthroughs
The real scarcity in AI infrastructure is shifting from GPUs to Storage and Stage memory as organizations broadly deploy AI inference.
The Global Chip Landscape
While the chip market is led by US AI chip makers, alternatives and critical material suppliers are rising.
The Memory Hierarchy Explained
From persistent storage to ultra-fast compute: data moves up the hierarchy to feed the chip.
Chip Specs, Components & Korea Sovereign AI
Explore the specific benchmarks and architectural data driving this week's AI hardware narrative.
Chip Specs Comparison
US AI Chip Makers vs Rising Alternatives
| Metric | Huawei Ascend 910C | NVIDIA H20 (Restricted) | NVIDIA Vera Rubin |
|---|---|---|---|
| Process Node | SMIC 7nm (DUV) | TSMC 5nm (EUV) | TSMC 3nm (EUV) |
| Raw Compute | ~1,100 TFLOPS | 296 TFLOPS | 50,000 TFLOPS |
| Memory Bandwidth | 3.2 TB/s | 4.0 TB/s | 22 TB/s |
| Interconnect Speed | 392 GB/s | 900 GB/s (NVLink) | 3,600 GB/s (NVLink v5) |
Key Takeaways
Jensen Huang's famous '5-Layer Cake Concept' illustrates that AI isn't just about models; it spans Application, Model, Infrastructure, Chips, and Energy.